1. Field of the Invention
The present invention relates to a liquid crystal display device used in a television receiver, a monitor, a display part of a mobile terminal device and the like, and a substrate for a display device used therein.
2. Description of Background Art
A production method of a conventional channel etch thin film transistor (TFT) substrate used in a transmissive liquid crystal display device is described with reference to FIGS. 24A to 24C. FIG. 24A is a cross sectional view of a pixel area of a TFT substrate, FIG. 24B is a cross sectional view of a vicinity of a terminal part 150 (gate bus line terminal), and FIG. 24C is a cross sectional view of a vicinity of a terminal part 151 (drain bus line terminal).
(1) An Al film (thickness: 150 nm) and an Mo film (thickness: 50 nm), collectively indicated by reference numerals 112, 118, 150 are formed on a transparent insulating substrate 110 by a sputtering method to form an accumulated film.
(2) A resist pattern of a gate electrode 112, a gate bus line, a storage capacity (Cs) bus line 118, a terminal 150 therefor, and necessary markings is formed by a photolithography method. Subsequently, the accumulated film is etched with a phosphoric acid Al etchant. The resist is then removed, and the substrate is rinsed.
(3) An SiN film (thickness: 400 nm) to be a gate insulating film 130, an a-Si film (thickness: 100 nm) to be an operation semiconductor film 127, and an n+ a-Si film (thickness: 50 nm) to be a contact layer 129 are formed continuously in the same CVD process without breakage of vacuum to cover the accumulated electrodes including the bus lines.
(4) An island resist pattern is formed on the gate electrode 112 by a photolithography method. Thereafter, the n+ a-Si film and the a-Si film are dry-etched by using a fluorine gas, such as SF6 and CF4, to form a contact layer and an operation semiconductor layer 127, both of which are in an island form. The resist is then removed, and the substrate is rinsed.
(5) An Mo film (thickness: 50 nm), an Al film (thickness: 150 nm), collectively indicated by reference numerals 119, 121, 122, 151 and an Mo film (thickness: 50 nm) are then formed by a sputtering method.
(6) A resist pattern is then formed by a photolithography method on an area for forming a drain bus line, a drain electrode 121, a source electrode 122, a terminal part 151 and an intermediate electrode 119. The Mo/Al/Mo film is etched with a phosphoric acid Al etchant. Subsequently, the contact layer above the channel part is removed by dry etching using a chlorine gas to isolate elements. The resist is then removed, and the substrate is rinsed. The three terminals of TFT are thus formed through the aforementioned process.
(7) An SiN film (thickness: 300 nm) as a protective film 132 is formed by a CVD method to cover the TFT.
(8) A resist pattern is formed by a photolithography method to form openings above the terminal parts 150 and 151 for the gate bus line, the Cs bus line 118 and the drain bus line, the source electrode 122 and the intermediate electrode 119. Subsequently, the protective film 132 is removed on the terminal parts 150 and 151 and the electrodes 122 and 119 to form contact holes 140, 141 and 142. Since the Mo film has no selectivity to dry etching with a fluorine gas, the Mo film is reduced in thickness. In some cases, the Al film under the Mo film is exposed. In this case, the outer peripheral parts of the contact holes 140, 141 and 142 suffer side etching due to recession of the resist pattern as described in Patent Document 1. Accordingly, the Mo film remains at the outer peripheral parts of the contact holes 140, 141 and 142, and thus ITO can be made in contact therewith at these parts. The resist is then removed, and the substrate is rinsed.
(9) An ITO film (thickness: 70 nm) as a transparent electroconductive film is formed by a sputtering method.
(10) A resist pattern is formed by a photolithography method on an area for forming a pixel electrode 116 and upper electrodes 152 and 153 for connection to cover the contact holes 141 and 142 above the terminal parts 150 and 151. Subsequently, the ITO film is etched by wet etching using an organic acid, such as oxalic acid. The resist is then removed, and the substrate is rinsed. Finally, the substrate is subjected to a heat treatment at 200° C. for about 1 hour for crystallization of the ITO film and stabilization of the TFT. After the aforementioned process, prescribed inspections for electric characteristics are carried out to complete a channel etch TFT substrate.
A production method of a conventional half tone channel etch TFT substrate used in a transmissive liquid crystal display device is described with reference to FIGS. 25A to 25C. FIG. 25A is a cross sectional view of a pixel area of a TFT substrate, FIG. 25B is a cross sectional view of a vicinity of a terminal part 150 (gate bus line terminal), and FIG. 25C is a cross sectional view of a vicinity of a terminal part 151 (drain bus line terminal).
(1) An Al film (thickness: 150 nm) and an Mo film (thickness: 50 nm), collectively indicated by reference numerals 112, 118, 150 are formed on a transparent insulating substrate 110 by a sputtering method to form an accumulated film.
(2) A resist pattern of a gate electrode 112, a gate bus line, a storage capacity (Cs) bus line 118, a terminal 150 therefor, and necessary markings is formed by a photolithography method. Subsequently, the accumulated film is etched with a phosphoric acid Al etchant. The resist is then removed, and the substrate is rinsed.
(3) An SiN film (thickness: 400 nm) to be a gate insulating film 130, an a-Si film (thickness: 100 nm) to be an operation semiconductor film 127, and an n+ a-Si film (thickness: 50 nm) to be a contact layer 129 are formed continuously in the same CVD process without breakage of vacuum to cover the accumulated electrodes including the bus lines. Subsequently, an Mo film (thickness: 50 nm), an Al film (thickness: 150 nm) and an Mo film (thickness: 50 nm) are formed by a sputtering method.
(4) A resist pattern is then formed by a photolithography method on an area for forming a drain bus line intersecting the gate bus line, an intermediate electrode 119, a terminal part 151 and a TFT. An exposure mask used in this step enables half tone exposure (having an exposure amount, for example, of about half of the other exposure part) on an area between a source electrode and a drain electrode to be a channel part of the TFT. According to the half tone exposure, the cross sectional shape of the resulting resist pattern is, for example, in a staircase shape, and the thickness of the resist pattern above the channel part is smaller than the other parts.
(5) The Mo/Al/Mo film, collectively indicated by reference numerals 119, 121, 122, 151 is etched with a phosphoric acid Al etchant. Subsequently, the n+ a-Si film and the a-Si film are dry-etched, and a part (upper part) of the resist pattern in a staircase shape is removed by ashing with a gas containing oxygen to expose the Mo/Al/Mo film on the area between the source electrode and the drain electrode to be the channel part of the TFT, followed by etching with the aforementioned etchant. Subsequently, the n+ a-Si film on an area to be the channel part of the TFT is removed, for example, by dry etching using a chlorine gas to isolate elements. The resist is then removed, and the substrate is rinsed.
(6) The three terminals of TFT are thus formed through the aforementioned process.
(7) An SiN film (thickness: 300 nm) as a protective film 132 is formed by a CVD method to cover the TFT.
(8) A resist pattern is formed by a photolithography method to form openings above the terminal parts 150 and 151 for the gate bus line, the Cs bus line 118 and the drain bus line, the source electrode 122 and the intermediate electrode 119. Subsequently, the protective film 132 is removed on the terminal parts 150 and 151 and the electrodes 122 and 119 to form contact holes 140, 141 and 142. Since the Mo film has no selectivity to dry etching with a fluorine gas, the Mo film is reduced in thickness. In some cases, the Al film under the Mo film is exposed. In this case, the outer peripheral parts of the contact holes 140, 141 and 142 suffer side etching due to recession of the resist pattern as described in Patent Document 1. Accordingly, the Mo film remains at the outer peripheral parts of the contact holes 140, 141 and 142, and thus ITO can be made in contact therewith at these parts. The resist is then removed, and the substrate is rinsed.
(9) An ITO film (thickness: 70 nm) as a transparent electroconductive film is formed by a sputtering method.
(10) A resist pattern is formed by a photolithography method on an area for forming a pixel electrode 116 and upper electrodes 152 and 153 for connection to cover the contact holes 141 and 142 above the terminal parts 150 and 151. Subsequently, the ITO film is etched by wet etching using an organic acid, such as oxalic acid. The resist is then removed, and the substrate is rinsed. Finally, the substrate is subjected to a heat treatment at 200° C. for about 1 hour for crystallization of the ITO film and stabilization of the TFT. After the aforementioned process, prescribed inspections for electric characteristics are carried out to complete a half tone channel etch TFT substrate.
Next, a production method of a conventional channel protective film TFT substrate used in a transmissive liquid crystal display device is described with reference to FIGS. 26A to 26C. FIG. 26A is a cross sectional view of a pixel area of a TFT substrate, FIG. 26B is a cross sectional view of a vicinity of a terminal part 150 (gate bus line terminal), and FIG. 26C is a cross sectional view of a vicinity of a terminal part 151 (drain bus line terminal).
(1) An Al film (thickness: 150 nm) and an Mo film (thickness: 50 nm), collectively indicated by refernce numerals 112, 118, 150 are formed on a transparent insulating substrate 110 by a sputtering method to form an accumulated film.
(2) A resist pattern of a gate electrode 112, a gate bus line, a storage capacity (Cs) bus line 118, a terminal 150 therefor, and necessary markings is formed by a photolithography method. Subsequently, the accumulated film is etched with a phosphoric acid Al etchant. The resist is then removed, and the substrate is rinsed.
(3) An SiN film (thickness: 400 nm) to be a gate insulating film 130, an a-Si film (thickness: 100 nm) to be an operation semiconductor film 127, and an SiN film (thickness: 150 nm) to be a channel protective film 128 are formed continuously in the same CVD process without breakage of vacuum to cover the accumulated electrodes including the bus lines.
(4) An island resist pattern is then formed by a photolithography method on the gate electrode 112. The SiN film is then dry-etched by using a fluorine gas, such as SF6 and CF4, to form a channel protective film 128 in an island form. The resist is then removed, and the substrate is rinsed.
(5) Subsequently, after removing an oxide film on the a-Si film by using buffered hydrofluoric acid, an n+ a-Si film (thickness: 150 nm) to be a contact layer 129 is formed by a CVD method, and an Mo film (thickness: 50 nm), an Al film (thickness: 150 nm) and an Mo film (thickness: 50 nm), collectively indicated by reference numerals 119, 121, 122, 151 are formed by a sputtering method.
(6) A resist pattern is formed by a photolithography method on an area for forming a drain bus line, a drain electrode 121, a source electrode 122, a terminal part 151 and an intermediate electrode 119. The Mo/Al/Mo film is etched with a phosphoric acid Al etchant. Subsequently, the contact layer is removed by dry etching using a chlorine gas to isolate elements. The resist is then removed, and the substrate is rinsed. The three terminals of TFT are thus formed through the aforementioned process.
(7) An SiN film (thickness: 300 nm) as a protective film 132 is formed by a CVD method to cover the TFT.
(8) A resist pattern is formed by a photolithography method to form openings above the terminal parts 150 and 151 for the gate bus line, the Cs bus line 118 and the drain bus line, the source electrode 122 and the intermediate electrode 119. Subsequently, the protective film 132 is removed on the terminal parts 150 and 151 and the electrodes 122 and 119 to form contact holes 140, 141 and 142. Since the Mo film has no selectivity to dry etching with a fluorine gas, the Mo film is reduced in thickness. In some cases, the Al film under the Mo film is exposed. In this case, the outer peripheral parts of the contact holes 140, 141 and 142 suffer side etching due to recession of the resist pattern as described in Patent Document 1. Accordingly, the Mo film remains at the outer peripheral parts of the contact holes 140, 141 and 142, and thus ITO can be made in contact therewith at these parts. The resist is then removed, and the substrate is rinsed.
(9) An ITO film (thickness: 70 nm) as a transparent electroconductive film is formed by a sputtering method.
(10) A resist pattern is formed by a photolithography method on an area for forming a pixel electrode 116 and upper electrodes 152 and 153 for connection to cover the contact holes 141 and 142. Subsequently, the ITO film is etched by wet etching using an organic acid, such as oxalic acid. The resist is then removed, and the substrate is rinsed. Finally, the substrate is subjected to a heat treatment at 200° C. for about 1 hour for crystallization of the ITO film and stabilization of the TFT. After the aforementioned process, prescribed inspections for electric characteristics are carried out to complete a channel protective film TFT substrate.
A production method of a conventional channel etch TFT substrate used in a reflective liquid crystal display device is described with reference to FIGS. 27A to 27C. FIG. 27A is a cross sectional view of a pixel area of a TFT substrate, FIG. 27B is a cross sectional view of a vicinity of a terminal part 150 (gate bus line terminal), and FIG. 27C is a cross sectional view of a vicinity of a terminal part 151 (drain bus line terminal).
After effecting the steps (1) to (8) of the production method of a transmissive channel etch TFT substrate, upper electrodes 152 and 153 are formed with a transparent electroconductive film on the terminal parts 150 and 151. A transparent pixel electrode 116 is not formed herein as being different from the transmissive TFT substrate. Thereafter, protrusions 160 for forming irregularity are partially formed within the pixel area, and an organic film 161 is formed over the entire protrusions 160 for forming irregularity. Irregularity is formed on the organic film 161 corresponding to the protrusions 160 for forming irregularity. Instead of the protrusions 160 for forming irregularity, some kind of underlying structures for forming irregularity may be formed in the steps (1) to (8).
An Mo/Al film is then formed by a sputtering method. A resist pattern is formed by a photolithography method on an area for forming a reflective electrode 117. The Mo/Al film is then wet-etched to form a reflective electrode 117. The reflective electrode 117 is patterned into a large size to overlap the gate bus line and the drain bus line. An Al single layer film is not used but an Mo film is used as an underlayer because the Mo film has such a function of a buffer film that prevents the upper electrodes 152 and 153 (ITO) above the terminal parts 150 and 151 and the Al layer from disappearing due to a battery effect in a developing step in the photolithography method. The production method of a reflective TFT substrate requires at least four electrode process steps including a gate process step for forming the gate electrode 112, a source/drain process step for forming the drain electrode 121 and the source electrode 122, a terminal process step for forming the upper electrodes 152 and 153, and a reflective electrode process step for forming the reflective electrode 117.
As having been described, the conventional liquid crystal display device has such a problem that the production methods thereof are complicated.
Patent Document 1: JP-A-2000-77666
Patent Document 2: JP-A-6-291318
Patent Document 3: JP-A-2003-57638